the journey of IAS

[logistic_guy]

On the IAS, describe in English the process that the CPU must undertake to read a value from memory and to write a value to memory in terms of what is put into the MAR, MBR, address bus, data bus, and control bus.

 

[logistic_guy]

Before we talk about the journey of this $\displaystyle \text{IAS}$, let us familiarize ourselves with some of the terms.

$\displaystyle \text{MBR} \rightarrow$ Memory Buffer Register

It can hold or store a word that can be either sent to or received from the memory or the $\displaystyle \text{I/O}$ unit.

 

[logistic_guy]

$\displaystyle \text{MAR} \rightarrow$ Memory Address Register

It stores the memory address where the specified word will be written to or read from.

 

[logistic_guy]

The $\displaystyle \text{address bus}$ carries memory locations.

 

[logistic_guy]

The $\displaystyle \text{data bus}$ carries the data being processed.

 

[logistic_guy]

The $\displaystyle \text{control bus}$ carries $\displaystyle \text{CPU}$ read/write signals and status signals.

 

[logistic_guy]

The whole idea of this $\displaystyle \text{IAS}$ is to read from the memory or to write to the memory. It needs instructions to do that, and these instructions are done in cycles. So it performs these instruction cycles in a repeating manner.

These instruction cycles consist mainly of two sub cycles:

$\displaystyle \text{fetch}$ and $\displaystyle \text{execute}$

 

[logistic_guy]

$\displaystyle \text{Step} \ \bold{1}$

The $\displaystyle \text{fetch}$ cycle starts. A signal is sent through the $\displaystyle \text{control bus}$ to read the address containing the opcode from the PC.

 

[logistic_guy]

$\displaystyle \text{Step} \ \bold{2}$

The address with the opcode is transferred from the PC (Program Counter) to the MAR via the address bus.

 

[logistic_guy]

$\displaystyle \text{Step} \ \bold{3}$

A signal is sent through the $\displaystyle \text{control bus}$ to read the content stored at the address in the $\displaystyle \text{MAR}$. This content consists of the opcode and the address which together form an instruction.

 

[logistic_guy]

$\displaystyle \text{Step} \ \bold{4}$

The content moves from the $\displaystyle \text{MAR}$ to the $\displaystyle \text{MBR}$ via the data bus.

 

[logistic_guy]

$\displaystyle \text{Step} \ \bold{5}$

A signal is transmitted through the $\displaystyle \text{control bus}$ to transfer the leftmost $\displaystyle 8$ bits from the $\displaystyle \text{MBR}$ to the $\displaystyle \text{IR}$ (Instruction Register).

 

[logistic_guy]

$\displaystyle \text{Step} \ \bold{6}$

The opcode moves from the $\displaystyle \text{MBR}$ to the $\displaystyle \text{IR}$ via the $\displaystyle \text{data bus}$.